ADP1851 Step-Down DC-DC Controller Reference Solution

Analog Devices’ ADP1851 is a wide input range, synchronous step-down DC-DC controller with voltage tracking and synchronization capabilities. The versatile ADP1851 can be configured for input feed-forward voltage mode or current mode. Input voltage range: 2.75-20V, output voltage range is 0.6V-0.9Vin. This document describes the design, operation, and test results of the ADP1851-EVALZ evaluation board. The input voltage range of this evaluation board is 9-15V, the output voltage regulation is set to 1.8V, and the maximum output current can reach 25A. The ADP1851 evaluation board includes externally adjustable soft-start, output overvoltage protection, externally programmable current limit, Power output, and a programmable good oscillator frequency ranging from 200KHz to 1.5MHz. This article describes the ADP1851 key features, block diagram, evaluation board ADP1851-EVALZ key features, circuit diagram, bill of materials, and PCB component layout.

The ADP1851 is a wide range input, dc-to-dc, synchronous buck controller capable of running from commonly used 3.3 V to 12 V (up to 20 V) voltage inputs. The device nominally operates in current mode with valley current sensing providing the fastest step response for digital loads. It can also be config-ured as a voltage mode controller with low noise and crosstalk for sensitive loads.

The ADP1851 is ideal in system applications requiring multiple output voltages. The ADP1851 includes a synchronization feature to eliminate beat frequencies between switching devices. It also provides accurate tracking capability between supplies and includes precision enable and power-good functions for simple, robust sequencing.

The ADP1851 provides a high speed, high peak current gate driving capability to enable energy efficient power conversion. The device can be configured to operate in power saving mode by skipping pulses, reducing switching losses, and improving efficiency at light load and standby conditions.

The accurate current limit allows design within a narrower range of tolerances and can reduce overall converter size and cost. The ADP1851 can regulate down to 0.6 V output using a high accuracy reference with ±1% tolerance over the temperature range of −40°C to + 125℃.

ADP1851 main features:

Input voltage range: 2.75V to 20V

Output voltage range: 0.6 V to 90% VIN

Maximum output current of more than 25 A

Current mode architecture

Configurable to voltage mode

±1% output voltage accuracy over temperature

Voltage tracking

Programmable frequency: 200 kHz to 1.5 MHz

Synchronization input

Power saving mode at light load

Precision enable input

Power good with internal pull-up resistor

Adjustable soft start

Programmable current sense gain

Integrated bootstrap diode

Starts into a precharged load

Externally adjustable slope compensation

Suitable for any output capacitor

Overvoltage and overcurrent-limit protection

Thermal overload protection

Input undervoltage lockout (UVLO)

Available in 16-lead, 4 mm × 4 mm LFCSP

Supported by ADIsimPower design tool

ADP1851 application:

Intermediate bus and POL systems requiring sequencing and tracking, including

Telecom base station and networking

Industrial and instrumentation

Medical and healthcare

ADP1851 Step-Down DC-DC Controller Reference Solution

Figure 1. LT3791 block diagram

ADP1851-EVALZ main features:

Input voltage range: 9V to 15V

Output voltage: 1.8V

Output current: up to 25A

Switching frequency: 600 kHz

Operates in PWM or PSM

Designed for evaluation of the ADP1851 functionality

Flexible and easy to re-configure and modify

ADP1851-EVALZ circuit diagram:

Figure 2. ADP1851-EVALZ Circuit Diagram

ADP1851-EVALZ Bill of Materials:

PCB component layout:

The Links:   MG100H2CL1 2DI100M-050 BEST SOURCE

Analog I/O system for PLC/DCS applications supporting HART and Modbus connections

Programmable logic controllers (PLCs) and distributed control systems (DCSs) are used to monitor and control intelligent (HART-enabled) and analog field instrumentation in industrial automation applications.

Evaluation and Design Support

Circuit Evaluation Board

CN-0414 Circuit Evaluation Board (EVAL-CN0414-ARDZ)

CN-0418 Circuit Evaluation Board (EVAL-CN0418-ARDZ)

CN-0416 Circuit Evaluation Board (EVAL-CN0416-ARDZ)


Arduino form factor development platform (EVAL-ADICUP3029)

Design and integration files

PLC/DCS Wiki User Guide

Schematics, layout files, bill of materials, software

Circuit functions and advantages

Programmable logic controllers (PLCs) and distributed control systems (DCSs) are used to monitor and control intelligent (HART-enabled) and analog field instrumentation in industrial automation applications.

The circuit shown in Figure 1 is a simple DCS system consisting of a host, a single node, two 4-channel isolated analog input boards, and two 4-channel isolated analog output boards, which are managed locally by an Arduino-sized baseboard . The RS-485 transceiver is connected to a PC or other host so that the user can exchange data with the node using the Modbus protocol.

Analog input data is read locally and provided via a serial interface using the industry standard Modbus protocol, ensuring data integrity and compatibility across a range of software applications and libraries. Likewise, analog outputs are set by writing to Modbus registers, which are then converted to analog voltage or current signals.

Each node can support a combination of 4 analog input and output boards. As shown in Figure 2, multi-node systems up to 16 nodes can be designed using the provided hardware and software infrastructure. The circuit supports point-to-point HART communication and can be extended to a multi-point transfer station HART network, integrating multiple HART devices on the same channel.

The analog inputs and analog outputs of each board (group of 4) are electrically isolated, and the analog inputs support open circuit detection, simplifying fault detection and diagnosis. These features enhance reliability and durability when used in harsh industrial automation environments.

Figure 1. PLC (or single-node DCS) Modbus system functional block diagram

Figure 2. Functional block diagram of a multi-node DCS Modbus system

circuit description

This application focuses on demonstrating the development of a PLC/DCS system governed by a Modbus master, with examples showing how to use the latest features of key components. Single-node systems are often referred to as PLCs, and larger systems are often referred to as DCSs.

Each node can manage up to 16 analog field devices, sensors or drivers (HART compatible or analog only), and the system can be expanded to include up to 16 individual nodes. The system can also be used for general purpose precision analog data acquisition applications such as instrumentation, analog data logging, or test and measurement.

PLC/DCS topology

Multiple connection topologies are supported. In a single-node (PLC, or single-node DCS) system, the host can be directly connected to the USB serial port of the EVAL-ADICUP3029 platform board using a micro-USB cable, ideal for experiments requiring less than 2 meters between host and node room test and measurement applications.

In this point-to-point topology, the board’s quadruple analog inputs and outputs remain isolated from the host computer. Although not generally associated with laboratory equipment, the Modbus protocol provides a convenient, standard method of communicating with nodes. HART connectivity enables configuration of smart sensors and drives.

Signal integrity, noise pickup, and electrical failures become more serious concerns as the distance between host and node increases beyond 2 meters. In these cases, the EVAL-CN0416-ARDZ provides a reliable RS-485 connection to the host. In single-node, point-to-point systems, full-duplex or half-duplex communication is supported over distances over 1 km, depending on the baud rate.

For multi-node systems (better known as DCS), the EVAL-CN0416-ARDZ provides daisy-chain ports that support switchable half/full duplex operation and switchable terminations, so the system can integrate 2 to 16 nodes.

Because Modbus is used as a serial communication protocol to send information between devices over a serial link, simple, reliable, and durable systems can be implemented regardless of size. The hardware stack for PLC/DCS applications consists of three different reference designs.

analog input board

The CN-0414 shown in Figure 3 is used to measure 4 fully differential signals, or 8 single-ended voltage and 4 current signals. At the heart of this circuit is the AD4111 low Power, low noise 24-bit sigma-delta analog-to-digital converter (ADC) with an integrated ±10 V and 20 mA analog front end.

Its voltage input supports input ranges up to ±10 V. The AD4111 has a unique feature that supports open-circuit detection on ±10 V voltage inputs while operating from a single 5 V or 3.3 V supply, whereas previous solutions typically required supplies greater than ±10 V.

The current input supports an input range of 0 mA to 24 mA. The input impedance of the circuit is 250 Ω (60 Ω inside the AD4111), and all inputs are referenced to isolated ground. A 250 Ω input resistor is required on the current input so that the HART compliant AD5700-1 modem can be used with the AD4111.

The analog front end of the circuit, the AD4111 and AD5700-1, is isolated from the processing side by the ADuM5411 and ADuM3151, resulting in significant space savings compared to discrete transformer-based solutions.

The CN-0414 board is powered by a 9.5 V to 36 V DC power supply, which is typical in industrial automation systems, so it can be easily integrated into your system.

Figure 3. Analog Input Board

Analog output board

The CN-0418 shown in Figure 4 is a 4-channel voltage and current output board built on the AD5755-1 DAC with dynamic power control.

This circuit provides a 4 mA to 20 mA current output, as well as a unipolar or bipolar voltage output (±10 V). The board also features the AD5700-1 HART modem, which provides a complete analog output solution that supports HART connectivity. Also includes external transient protection circuitry, which is extremely important for applications in harsh industrial environments.

Current and voltage outputs are provided on separate pins, with only one output active at a time, allowing two output pins to be tied together and to a single port. The analog outputs are short-circuit and open-circuit protected.

The AD5755-1 integrates a DC-DC boost converter circuit based dynamic power control function to reduce power consumption in current output mode.

The AD5755-1 has four CHART pins, which correspond to the four output channels. HART signals can be coupled to these pins and appear on the corresponding output (if the output is enabled).

Figure 4. Analog Output Board

RS-485 Transceiver Board

The CN-0416 shown in Figure 5 is an isolated and non-isolated RS-485 transceiver board that enables easy data transfer between multiple systems or nodes, especially over long distances.

This circuit uses the ADM2682E RS-485 transceiver for isolated communication and the LTC2865 RS-485 for non-isolated communication. Both devices can be configured for full or half duplex operation, with open or terminated transmission lines.

The circuit uses an on-board RJ-45 jack, so it can be quickly and physically connected to the node using common CAT5 Ethernet cables. Termination resistance is set by default to 100 Ω for the characteristic impedance of a CAT5 cable, but can be configured to support the 120 Ω impedance of a standard RS-485 cable.

The data rate of the ADM2682E can reach 16 Mbps, providing a truly safe receiver input and adjusted differential voltage thresholds. It uses the iCoupler data channel, which provides 5 kV signal isolation, and the isoPower integrated DC-DC converter, which provides 5 kV power isolation.

Data rates of the LTC2865 can reach 20 Mbps, providing a truly secure receiver input. An internal window comparator determines the safe condition without adjusting the differential input voltage threshold.

Figure 5. RS-485 Transceiver Board

Wiring HART Compatible Field Devices

Figure 6. Wiring of HART Compatible Field Devices

HART Network

HART devices can operate in one of two network configurations, point-to-point or multidrop.

In point-to-point mode, a 4 mA to 20 mA signal is used to transmit one process variable, while additional process variables, configuration parameters, and other device data are transmitted digitally through the HART protocol. The 4 mA to 20 mA analog signal is not affected by the HART signal and can be used for control. The HART protocol provides access to auxiliary variables and other data that can be used to implement operations, commissioning, maintenance and diagnostics.

Modbus protocol

The software running on the EVAL-ADICUP3029 uses the Modbus protocol – a de facto open industrial communication standard. Modbus provides a reliable way to exchange data with individual nodes, ensuring data integrity through CRC error detection. As an open standard, there are numerous open source and commercial Modbus software libraries available for various platforms such as Windows®Linux®embedded platforms, etc.).

The software also provides a simple command line interface (CLI) mode that enables the system to be manually authenticated from the serial port without any additional software loaded on the host.

Hardware and software stacks

The PLC/DCS node system software and hardware protocol stack are shown in Figure 7.

Figure 7. PLC/DCS node system software and hardware protocol stack

After configuring the PLC/DCS hardware, the user generally selects the applicable Modbus library according to the language (such as C, Python, MATLAB) and host platform (such as Linux, Windows, embedded platform). Then, a simple test application must be written to convert the analog and HART parameters into Modbus register addresses and values.

The CN-0435 User Guide provides a complete description of the Modbus register map for this application and uses an open source Modbus debugger to verify Modbus compliance.

In addition, several top-level applications based on open source Modbus libraries are provided, including:

• Check system configuration: query all Modbus nodes and Display the configuration.

• Read and write output holding registers: Check or change the state of the output holding registers of all tested boards.

• Read Analog Input Registers: Check the status of the input registers of all tested boards.

• Read Analog Data: Read a single analog input or all analog inputs and Display the data on the console.

• Write Analog Data: Write the analog output to generate voltage or current.

• Analog Echo: Read the analog voltage or current of the analog input board, and then write the same value of the analog voltage or current to the analog output board.

common changes

The CN-0435 software reads analog input values ​​and writes analog output values ​​without local processing. The software can be extended to include functions such as fault detection and response, or to include closed-loop PID control loops, offloading these functions from the host computer, saving bandwidth on the communication bus.

The Raspberry Pi can be used as a compact and inexpensive host solution. The Raspberry Pi offers wired or wireless Ethernet connectivity and can be connected directly to the EVAL-ADICUP3029’s USB-UART.

The three most commonly used Modbus versions today are: Modbus ASCII, Modbus RTU and Modbus TCP. All Modbus messages are sent in the same format. The only difference between the three Modbus types is how the messages are encoded.

The number of devices that can be connected via Modbus is determined by the physical layer and data protocol. If the RS-485 physical layer is used with the Modbus RTU or Modbus ASCII data protocol, the maximum number of nodes that can be addressed is 32, however, if the Ethernet physical layer is used with the Modbus TCP data protocol, the addressable nodes to 247.

Device addresses are numbers from 0 to 247. Messages sent to address 0 (broadcast messages) are accepted by all slaves, but the numbers 1 to 247 are device-specific addresses.

The Arduino form factor of the CN-0414 and CN-0418 ensures compatibility with development platforms that support a wide range of other automation communication protocols, including Process Field Network (PROFINET), Process Field Bus (PROFIBUS), Ethernet for Control Automation Technology (EtherCAT), EtherNet /IP, Modbus Plus, and other protocols.

Circuit Evaluation and Testing

The following sections describe the equipment and general steps required to take the reference demo. The CLI option of the software can be used to assemble the DCS system and test its basic functionality. For full instructions and additional information, see the Distributed Control System (DCS) Demo Wiki User Guide.

Equipment requirements

The following equipment is required:

• PC with USB port and Windows 7 (32-bit) or higher

• Serial terminal programs such as TeraTerm or Putty

• One or more EVAL-CN0414-ARDZ circuit evaluation boards, and/or one or more EVAL-CN0418-ARDZ circuit evaluation boards, for each node

• One or more EVAL-CN0416-ARDZ boards for Modbus interface and another EVAL-CN0416-ARDZ board for each node

• An ADALM-UARTJTAG evaluation board with an additional EVAL-CN0416-ARDZ board (or other half-duplex RS-485 adapter)

• One EVAL-ADICUP3029 evaluation board for each node

• Micro USB cable

• One RJ-45 cable for the RS-485 interface and another cable for each node

• PLC system software or preset hex file

• 24 V DC at 1 A supply

start using

Here are the basic setup steps:

1. Plug the EVAL-ADICUP3029’s USB cable into the PC and flash the firmware to each board used.

2. Configure the hardware. Follow the Distributed Control System (DCS) Demo Wiki User Guide. Make sure the jumpers and switches on each board are set correctly. Or, for analog input boards, connect sensors or signal sources, and for analog output boards, connect actuators or multimeters.

3. For each node, stack the platforms and expansion boards together in the following order:

• EVAL-CN0416-ARDZ (top)

• EVAL-CN0414-ARDZ or EVAL-CN0418-ARDZ (optional)

• EVAL-CN0414-ARDZ or EVAL-CN0418-ARDZ (optional)

• EVAL-CN0414-ARDZ or EVAL-CN0418-ARDZ (optional)

• EVAL-CN0414-ARDZ or EVAL-CN0418-ARDZ (optional)

• EVAL-ADICUP3029 (bottom)

4. Connect an RJ-45 cable between the node and the RS-485 adapter (probably ADALM-UARTJTAG and EVAL-CN0416-ARDZ).

5. Connect the RS-485 adapter to the host.

6. Press the 3029_Reset button, or reboot the system.

For full details, see the Distributed Control System (DCS) Demo Wiki User Guide.

Functional block diagram

Figure 8. Single-node PLC analog I/O system

Figure 9. DCS analog I/O system

understand more

CN-0414 Design Support Package:

CN-0418 Design Support Package:

CN-0416 Design Support Package:

ADALM-UARTJATG Design Support Package:

EVAL-ADICUP3029 User Guide

ADICUP3029 GitHub repository

Datasheets and Evaluation Boards

CN-0414 Circuit Evaluation Board (EVAL-CN0414-ARDZ)

CN-0418 Circuit Evaluation Board (EVAL-CN0414-ARDZ)

CN-0416 Circuit Evaluation Board (EVAL-CN0414-ARDZ)


ADICUP3029 Development Platform (EVAL-ADICUP3029)

The Links:   BSM50GD120DN2 LC171W03-A4K4

ADIADAU1373 Low Power Stereo CODEC Solution

Analog Devices’ ADAU1373 is a low-Power stereo CODEC with integrated digital audio processing, supports stereo 48kHz recording and playback, stereo ADC and DAC support sampling rates from 8kHz to 48kHz and digital volume control, eight single-ended or four with PGA The differential input provides gain from -12dB to +18dB. The power consumption of 48kHz and 1.8V is 7mW for recording and 6mW for playback. It is mainly used in mobile phones, tablet computers, e-books, and handheld media players. This article introduces the main features of ADAU1373, block diagram, Stereo Class D application circuit diagram and ADAU1373 evaluation board circuit diagram, bill of materials, and PCB component layout.

The ADAU1373 is a low power, stereo audio codec with integrated digital audio processing that supports stereo 48 kHz record and playback. The stereo audio ADCs and DACs support sampling rates from 8 kHz to 48 kHz, as well as a digital volume control.

Eight single-ended or four differential analog inputs with PGAs are provided for adjusting the gain from −12 dB to +18 dB. They can be configured for microphones or line level signals.

Two stereo digital microphone inputs are supported; four digital microphones can be connected in total. In addition, three serial digital audio input/output ports are provided with asynchronous sample rate converters (ASRCs) to support various sampling rates, allowing for flexible system design in mobile phone applications. The inputs can be mixed and selected before the ADC or con-figured to bypass the ADC. Two stereo DACs are included, with a flexible mixing option for routing the signals internally.

The analog output side consists of line outputs, headphone output, speaker output, and receiver output. Two stereo single-ended line level outputs, which can be configured as two differential outputs, are included. The headphone output is stereo true ground centered (eliminating the need for coupling capacitors), with efficient Class-G (rail switching) architecture. The efficient stereo filterless Class-D switching amplifier provides ~1 W of stereo power for speakers. The differential receiver amplifier can be used to connect the separate receiver speaker . Two PLL blocks, which can lock to the inputs from 8 kHz to 27 MHz, are included.

The DSP allows system designers to compensate for the real-world limitations of microphones, speakers, amplifiers, and listening environments, resulting in a dramatic improvement in perceived audio quality through equalization, multiband compression, and limiting algorithms. The SigmaStudio™ graphical development tool, which includes audio processing blocks such as filters, mixers, dynamics processors, and amplifiers for fast development of custom signal flows, is used to program the ADAU1373.

ADAU1373 main features:

1 stereo ADC and 2 stereo DACs with sampling rates from 8 kHz to 48 kHz

Low power: 7 mW record, 6 mW playback, 48 kHz at 1.8 V

8 single-ended or 4 differential inputs with PGA

2 microphone bias reference voltages with current sense

2 stereo digital microphone inputs

Flexible analog input/output mixers

1 stereo differential or 2 stereo single-ended line outputs

True ground-centered stereo Class-G headphone amplifier, capable of 2 × 50 mW into 16 Ω at 1.8 V, 10% THD

Filterless stereo Class-D speaker amplifier, capable of 2 × 880 mW into 8 Ω at 3.6 V, 10% THD

Differential earpiece amplifier capable of driving 32 Ω

2 PLLs, supporting input clocks from 8 kHz to 27 MHz

I2C control interface

Digital audio processing

3 digital audio input and output ports with ASRC

I2S, PCM, right-justified, left-justified modes

4.05 mm × 3.82 mm, 81-ball, 0.4 mm pitch WLCSP package

−40℃ to +85℃ operating temperature range

ADAU1373 application:

Mobile phones, tablet PCs, e-books, portable media players

Figure 1. ADAU1373 Functional Block Diagram

Figure 2. ADAU1373 Typical Stereo Class D Application Circuit Diagram

ADAU1373 Evaluation Board

The ADAU1373 is a low power audio codec that supports stereo record and playback. It provides eight single-ended or four differential analog inputs with PGA for adjusting the gain. The support for two stereo digital microphone inputs is provided so that, in total, four digital microphones can be connected. In addition, three serial digital audio in/out ports are provided with ASRCs to support various sampling rates at the input/output ports, allowing flexible system design.

The analog output side consists of line outputs, a headphone output, a speaker output, and a receiver output. The two stereo single-ended line level outputs are included, which can be configured as two differential outputs. The headphone output is stereo true- ground-centered with efficient Class-G architecture. The efficient stereo filterless Class-D switching amplifier pro-vides around 1 W stereo power for speakers. The differential receiver amplifier can be used to connect the separate receiver speaker.

The ADAU1373 evaluation board includes the complete application circuit for the ADAU1373. The board is featured with USBi connection to the SigmaStudio™ graphical develop-ment tool running on a host PC, which is used to program the ADAU1373.

Included in this user guide is a detailed description for the ADAU1373 evaluation board. It is recommended that the ADAU1373 data sheet be read along with this user guide. Full details about the part are available in the ADAU1373 data sheet, which provides more detailed information about the specifica-tions, internal block diagrams, and application guidance for the codec IC.

Figure 3. ADAU1373 Evaluation Board Circuit Diagram (1)

Figure 4. ADAU1373 Evaluation Board Circuit Diagram (2)

Figure 5. ADAU1373 Evaluation Board Circuit Diagram (3)

Figure 6. ADAU1373 Evaluation Board Circuit Diagram (4)

Figure 7. ADAU1373 Evaluation Board Circuit Diagram (5)

Figure 8. ADAU1373 Evaluation Board Circuit Diagram (6)

Figure 9. ADAU1373 Evaluation Board Circuit Diagram(7)

Figure 10. ADAU1373 Evaluation Board Circuit Diagram(8)

Figure 11. ADAU1373 Evaluation Board Circuit Diagram(9)
ADAU1373 Evaluation Board Bill of Materials:

Figure 12. ADAU1373 Evaluation Board Power Section

Figure 13. ADAU1373 Evaluation Board Digital Audio Interface and Drizzle Digital Microphone Interface Section
For details, see:

The Links:   PM100DSA120 SKM400GB124D

A Multi-Channel Active Noise Control Algorithm Based on Variable Step Size

All sounds are mixed from a series of sound signals of different frequencies. If a sound can be artificially generated, the frequency of which is exactly the same as the noise to be eliminated, but the phase is opposite to that of the noise to be completely eliminated. Active noise control (ANC) is to add a circuit for noise analysis to the device, and through the controller to quickly calculate and analyze, generate an artificial sound signal that can cancel the external noise, and play the opposite phase signal through the speaker to cancel the target noise.

0 Preface

All sounds are mixed from a series of sound signals of different frequencies. If a sound can be artificially generated, the frequency of which is exactly the same as the noise to be eliminated, but the phase is opposite to that of the noise to be completely eliminated. Active noise control (ANC) is to add a circuit for noise analysis to the device, and through the controller to quickly calculate and analyze, generate an artificial sound signal that can cancel the external noise, and play the opposite phase signal through the speaker to cancel the target noise. ANC can be used in a variety of applications, including personal hearing devices[1-2]duct and room acoustic enhancement, engine exhaust noise suppression and improved vehicle enclosure wind noise, acoustics in aircraft cabins and vibrating machines[3-4]. With the rapid development of modern industry, the Power of most industrial equipment is getting bigger and bigger, the speed is getting faster and faster, and the noise hazard is becoming more and more prominent. Noise not only affects product quality, operation accuracy, shortens product life, endangers safety, but also pollutes the environment and affects human health. Therefore, mastering the noise control technology is a major issue facing the industrial development.

In practical research applications, the filtered x least mean square algorithm (filteredx LMS, FxLMS)[5] The structure is simple and the algorithm is stable, so the FxLMS algorithm is the most widely used in ANC controllers; there is also an improved normalized LMS[6]the steady-state error can be reduced to a very small, but the convergence speed will be greatly affected; SVSLMS based on Sigmoid function[7]The algorithm is also widely used, and its convergence speed is fast, but the steady-state error cannot meet the requirements.Such variable-step control algorithms[8-11] The main problem is that the convergence step size in the algorithm is mostly a function of the feedback error signal. After the iterative calculation of the filter, the convergence of the signal is not zero, which will cause the system to have a non-zero offset problem, which will easily lead to a large error after the system enters a steady state and no longer converges. Therefore, it has become a feasible direction to improve the noise reduction effect of low-frequency noise by constructing a variable-step active noise control system with the correlation function of the feedforward signal as the reference.

In the free field, the diameter of the “anechoic zone” produced by the single-channel active noise control system is approximately 1/10 the wavelength of the control sound[12], that is to say, the effective range of the conventional single-channel active control system is only twenty or thirty centimeters in diameter, which is far from enough for practical applications.Therefore, the active control of large area noise needs to use a multi-channel control algorithm to achieve[13-17]this paper proposes a multi-channel active control algorithm based on variable step size, and uses simulation experiments to verify its feasibility.

1 Control algorithm

1.1 Variable step size

When a fixed convergence step is used, the convergence accuracy and the convergence time of the system show an opposite situation, that is, when the convergence step is set smaller, the convergence accuracy is higher, but the convergence time is greatly prolonged; on the contrary, when the convergence step is set larger , the convergence time is reduced, but the convergence accuracy is greatly reduced. therefore,

In order to eliminate the limitation of fixed convergence step size FxLMS, ​​consider adopting variable convergence step size FxLMS algorithm.

In Variable Convergence Step Size Algorithm Based on Sigmiod Function (SVSLMS)

From equation (1), the variable convergence step μ(n) is the Sigmiod function of e(n). During the initial convergence, the larger the error, the larger the value of the convergence factor; as the error gradually decreases, the value of the convergence factor also decreases. Therefore, the criteria of adaptive filtering are satisfied at the same time: fast convergence speed, tracking speed and small steady-state error. However, the calculation of this formula is cumbersome, and the stability of the error e(n) near 0 is not ideal, and it is easy to cause non-zero offset. In the normalized LMS algorithm, the variable step size is normalized with the power value of the reference input signal, so as to obtain the variable convergence step size μ related to the power of the reference input signal. The variable convergence factor function is expressed as:

Since the hardware implementation of the Euclidean square norm of x(n) is more complicated, and the reference input signal only takes the current instantaneous value, the Euclidean square norm of x(n) is equal to the square of the absolute value of x(n), which is improved as:

where |x(n)|2 is the squared value of the instantaneous reference input signal in the nth iteration. It can be seen from equations (1) and (3) that in the calculation of the variable convergence factor, the operation of solving the autocorrelation matrix of the input vector is transformed into the square value operation of the scalar, which can improve the convergence, so let:

In order to improve the problem of non-zero offset, change the input signal of variable step size to the variation of the system reference signal, we can get

1.2 Multi-channel variable step size

The MIMO filter-x LMS algorithm is the most widely used noise control algorithm. The system block diagram is shown in Figure 1. Suppose there are I reference sensors, J secondary speakers, and K error sensors in the system. The IJ adaptive filters are transversal filters whose length is L, and the filter weight coefficients are uniformly expressed as W(z) in vector form. Hp(z) represents the transfer function of the IK primary paths, Hs(z) represents the transfer function of the JK secondary paths, and Hs`(z) is the estimated value of the transfer function of the secondary paths. The primary and secondary paths are equivalent to FIR filters, assuming their lengths are Lp and Ls, respectively.

Let xi(n) be the input signal of the ith reference sensor at the nth time, which is called the ith reference signal, that is, xi(n)=[xi(n), xi(n-1),…,xi(n-L+1)]T; yj(n) is the output signal of the jth controller at the nth time, expressed as y(n) = [y1(n), y2(n),…, yJ(n)]T; dk(n) is the expected signal at the nth time at the kth error sensor, expressed as d(n) = [d1(n), d2(n),…, dK(n)]T; ek(n) is the error term signal at the n-th time here, expressed as e(n) = [e1(n), e2(n),…, eK(n)]T.

Then the output signal of the jth speaker is sj(n) = yj(n)×Hs(n).The error signal vector can be written as

In the formula: Hs(n) is the K×J order sub-path impulse response matrix, and the (k, j)th element is hskj(n); r(n) is the J×KLs order filter-x signal matrix, which (j , k) element is

The objective function of the multi-channel adaptive active control system is set as

Similar to the commonly used FxLMS algorithm, using the principle of the steepest descent method, the iterative formula of the controller weight coefficient can be derived as:

w(n +1) = w(n)−2μr(n)e(n) (10)

The whole algorithm expression is summarized as formulas (11)~(13)

The signal received by the kth error sensor is

Iterative formula of weight coefficients from the ith reference sensor to the jth controller

in the formula

where μ is the convergence step size, which can be obtained from equation (5). Then this algorithm is named variable-step-size multi-channel filtering x least mean square algorithm (VM-FxLMS).

2 Simulation experiment

2.1 Single-channel algorithm performance

The ANC system model is established in MATLAB, and the signal simulates the noise of the exhaust fan. Fan noise is composed of rotating noise and flocculation noise. The rotating noise is represented by a sinusoidal signal with a frequency of about 500 Hz, and the flocculation noise is represented by white noise with a cut-off frequency of 4 kHz. Add a low-pass filter to the system to filter out noise above 4 kHz.

The following will use the FxLMS algorithm, the normalized NLMS algorithm, the SVSLMS algorithm and the single VM-FxLMS algorithm proposed in this paper to test and compare the simulated noise. The initial convergence step μ of the three algorithms is set to 0.01. The simulation test results are shown in Figure 2.

In the initial convergence state, it can be seen from Figure 2 a) and b) that the convergence speed of the variable-step algorithm has obvious advantages over the fixed-step algorithm. The single VM-FxLMS algorithm proposed in this paper has a fast convergence speed, and the algorithm can further converge when other algorithms tend to be stable. In the steady-state stage, it can be seen from Figure 2 c) that the single-VM-FxLMS algorithm has the lowest steady-state error and is stable without obvious fluctuations. It can be seen from the simulation results that the algorithm proposed in this paper is better than the traditional fixed-step FxLMS algorithm and some other variable-step algorithms.

2.2 Implementation of multi-channel area noise reduction

A 4 m × 4 m area is simulated in MATLAB, and multiple noise sources are set in the area. The noise components are the same as the noise sources set in Section 2.1, and more interference is added. The initial convergence step μ is set to 0.01, and the multi-channel ANC system is set to 16 channels. Figure 3 shows the noise simulation graphs before and after noise reduction in this area.

As shown in Figure 3 a), the average noise in this area is about 50 dB, and the peak noise is about 60 dB. The simulation diagram after noise reduction is shown in Figure 3 b). Except for individual points, the noise in the entire area has been significantly reduced, and the average residual noise is about 25 dB. After noise reduction, the noise is reduced by about 25 dB compared to before noise reduction, and there is an increase in noise in individual areas. This simulation experiment shows that the multi-channel ANC system proposed in this paper has a very good control effect on regional noise reduction.

3 Conclusion

The multi-channel noise active control method based on variable step size proposed in this paper uses the variation of the reference signal as the input signal of the variable step size function, which can improve the non-zero offset of the algorithm. Compared with other commonly used control algorithms, the convergence There are obvious advantages in speed and convergence effect. Then the variable step size algorithm is extended to the multi-channel active control algorithm. For the simulation of noise control in a large area, the multi-channel ANC system shows a very good noise reduction effect. At the same time, the computational load of the multi-channel ANC system is a focus that needs further research, which is also the focus of future research work.

The Links:   GBPC3504-G SP14Q003-A

Hongmeng meets smart wear, how Huawei sports health can be realized

Zhang Wei, president of Huawei’s smart wearable and sports health product line, said on the topic of sports health, “Huawei hopes to make the best connections in the health industry.” In China, digital health has become the focus of attention, including connectivity and life cycle services. and standardization.

Previously, Huawei paid more attention to experience and technology, but this year, it focused on empowering partners to build a software and hardware ecosystem. In Zhang Wei’s view, the future trend of the big health industry is digitization. The model that uses smart devices as touch points, data-driven, intelligent as a means, and user-centric model is an important factor for Huawei to make changes in the health management business. opportunity.

1. Wearable shipments exceeded 60 million, from consumers to medical institutions

Zhang Wei said that this year, Huawei Sports Health has more than 200 million registered users, and Huawei has shipped more than 60 million wearable devices in more than 170 countries. During the exchange, Zhang Wei also mentioned many actual implementation cases of Huawei’s health empowerment industry.

For example, Huawei recently cooperated with RQ, a professional analysis and guidance software for running data. One of the novice users ran 5 kilometers at a pace of 10 minutes each time. With the help of data provided by Huawei Sports Health and Huawei wearable products, through the data analysis and analysis of RQ Feedback completed 14 weeks of training and successfully completed his first half marathon.

In the research of digital heart health, Huawei has cooperated with 301 Hospital to launch atrial fibrillation prediction research based on the previous atrial fibrillation screening, and conducted atrial fibrillation screening prediction through the heart health research of 301 Hospital.

It is said that Huawei’s sports health platform has helped the 301 hospital to recruit 1.8 million users. This sample size is of great help to medical research and can more accurately identify the problem. At the same time, these data can promote the upgrading of medical methods.

Overseas, Huawei cooperates with a company in Ireland, which is also a developer partner, to monitor the health of medical staff through Huawei wearable devices and data, as well as temperature stickers and related equipment in the industry, to prevent medical staff from being in the process of epidemic prevention and control. Infections have not been detected in time.

2. This year, focus on empowering developers and partners to build a software and hardware ecosystem

In the field of sports health, Huawei hopes to empower partners in sports, sleep, emotional management, stress management and other fields through the accumulation of technologies in sensors, algorithms, and operating systems. The main platforms for empowerment are HUAWEI Health and HUAWEI Research.

At this developer conference, Huawei upgraded the HUAWEI Health platform more clearly and integrated it into the Huawei HMS core5.0 system. Last year, Hi Health 1.0 was upgraded to 2.0. Provide HUAWEI Health’s Kit, these Kits can facilitate developers to develop more health apps for mobile phones and watches.

Zhang Wei said that last year they paid more attention to experience and technology, and this year they will pay more attention to empowering partners through the HUAWEI Health platform to build a hardware and application ecosystem.

Hardware and software are Huawei’s north-south ecology. After the outbreak of this year’s epidemic, the sales of indoor equipment have soared, and consumers have a strong desire to exercise. He specifically mentioned that with the advancement of technology, the means of indoor fitness will become more and more in the future. many.

In the south direction, the HUAWEI Health data platform can exchange data with ecological manufacturers such as treadmills and spinning bikes. Its data can be transmitted to the HUAWEI Health platform with the user’s authorization. Whether users are in the gym, at home or on business trips, As long as it is connected to the fitness equipment connected to HUAWEI Health, your data can be taken away and saved, forming a long-term data accumulation.

For consumers, Huawei hopes to further simplify the user experience. Zhang Wei feels that with the development of HarmonyOS, the interconnection with fitness equipment can be achieved in the future with only one step or even one step. , and direct remote sensing in the future”, and the upgrade of this connection experience needs to be completed by Huawei and its partners.

When it comes to profitability, Zhang Wei has not shied away. He said that in the past few years including this year, the consumer-oriented APP and Health platform have been empowering. He hopes that the overall solution can achieve a complete experience and connect more external partners. , Profit is not our current goal, experience and value services are the focus.

3. Hongmeng distributed technology will change the status quo of equipment isolation

For Huawei, their core advantage is that their solutions are a combination of device and cloud, from hardware to system to software, and are built around scenarios. This concept comes from Huawei’s “1+8+N” The all-scenario strategy, in Zhang Wei’s view, is much more competitive than the past solutions.

“We use the smart terminal as a contact point to really reach consumers, with the hardware foundation and application ecology.”

Mention the problem that data in smart devices are generally “isolated” from each other. Zhang Wei said that in September, Huawei just launched a new feature in sports health called “healthy life”, a modeled data that integrates Huawei’s data on exercise, sleep, and emotional management to form a model for evaluating healthy life. .

This model will regularly formulate some small tasks for consumers to manage, carry out task-driven health management, “integrate more data together, and evaluate users’ health behavior.” Conditions are all touched by healthy behaviors, and if healthy behaviors can be managed, it will be beneficial for most users.

At the same time, he also mentioned Hongmeng OS. He said that this is a very important system for creating a hardware integrated experience in the future. Through the underlying support of Hongmeng OS, Huawei can target different hardware platforms and create a unified experience capability.

Zhang Wei gave an example at the scene. Now everyone sees that Huawei’s sports health is an APP on the mobile phone, but in fact, the sports health APP can have different presentation forms and functional attributes on different terminals. For example, we can present a complete picture on the mobile phone. The sports health management platform has a variety of data and courses, while on the big screen, it will focus on fitness, interaction, live broadcast, and even future telemedicine.

On the watch, you can focus on health monitoring, reminders, and early intervention. Sports health is “distributed” on different hardware. Huawei will open up this distributed technology, allowing developers to develop applications on Huawei’s wearable devices, mobile phones, tablets and other hardware to achieve “one development, multiple terminals”. deployment” effect.

In Zhang Wei’s view, hardware is actually to present the value that users are most concerned about by using different UIs, using different forms of hardware, suitable for different scenarios, and showing the core value.

Consumers pay attention to the way of interaction, but they may not pay much attention to products. This is just a difference in form. This is also a long-term vision for the distributed experience that Hongmeng OS can create in the future. Huawei needs to move towards this goal step by step.

The Links:   DDB6U85N16 KCS057QV1AJ-G39

For efficient electric vehicle traction inverter design, you need a high-performance smart gate driver!

Different automotive subsystems have different requirements for system performance and functional safety. In traction inverter systems, for example, this trend toward boosting functions can maximize efficiency and reduce BOM costs. The emergence of high-performance smart gate drivers can reduce board area and reduce BOM costs while meeting the needs for improved functionality and performance.

In the automotive and e-mobility markets, the electrification of passenger and commercial vehicles has brought about dramatic changes in the development of various subsystems.

First, the development cycle from design concept to product launch for electric vehicle systems is shorter than for “traditional” vehicles. In addition, these relatively “simple” EV systems compared to ICE systems (engine and transmission) increase competition by allowing non-traditional Tier 1 suppliers to enter the automotive ecosystem.

To counter the impact of rising costs and maintain control over intellectual property and bill of materials (BOM), many OEMs are building the capability to design, develop and manufacture subsystems in-house. At the same time, traditional Tier 1 suppliers continue to invest in EV systems while competing with new entrants in an attempt to maintain penetration of OEMs.

To maintain partnerships and provide differentiated services, some Tier 1 suppliers integrate multiple key EV system components, such as inverters, traction motors and transmissions. Both OEMs and new Tier 1 suppliers need to quickly master system analysis and integration capabilities, especially with regard to functional safety requirements. As a result, they increasingly look to semiconductor suppliers to help them bridge this development and knowledge gap.

NXP believes that the world of the future will be greener and more sustainable. Learn about our scalable and secure solutions here >>

Different automotive subsystems have different requirements for system performance and functional safety. In traction inverter systems, for example, this trend toward boosting functions can maximize efficiency and reduce BOM costs. The emergence of high-performance smart gate drivers can reduce board area and reduce BOM costs while meeting the needs for improved functionality and performance.

Gate drivers such as NXP’s GD3100 and GD3160 are intelligent and allow programming to not only protect SiC or IGBT Power devices under harsh operating conditions, but also improve system efficiency and shorten fault detection/reaction times.

GD3160 block diagram

Integrated high-voltage (>1,000Vrms) isolation supports digital reporting of information from the high-voltage (400V to 800V) domain to the low-voltage (12V) domain. These parameters include various fault conditions, power device temperature, and VCE or VGE state of the power device. Enhanced monitoring of different parameters contributes to ASIL D functional safety of electric vehicle systems. Gate driver waveform shaping capabilities, such as segment drivers, allow customers to optimize switching to improve efficiency while preventing overshoot to reduce EMC noise.

For more information about GD3160, please click to read the latest product introduction >>

Traction Inverter System Block Diagram

NXP is committed to providing system solutions such as traction inverter reference designs, complete inverter evaluation tools, and functional safety documentation to reduce development costs and speed time to market.

author of this article

Namrata Pandya is a Product Marketing Manager for High Voltage Gate Drivers at NXP. For the past 15 years, Namrata has worked for ON Semiconductor and Microchip Technology, where he managed business development and product lines for a semiconductor product portfolio valued at over $60 million. She is responsible for driving 16 product lines from concept to launch. Namrata holds a master’s degree in electrical engineering from San Jose State University.

The Links:   2MBI100NB-120 LQ075V3DG01

2020 phone replacement strategy: what are the flagship 5G mobile phones with a budget of around 5K

With the staged victory in the prevention and control of the new crown pneumonia epidemic, many people say that March 2020 will usher in a wave of retaliatory consumption: in the catering market, milk tea, barbecue, hot pot, fried chicken… must be eaten at one time; In the smartphone market, if there is a demand for replacement, it will inevitably be dominated by 5G mobile phones, especially flagship 5G mobile phones with better performance in all aspects, which directly blows the flagship wind. At present, due to the high R&D expenses and device costs, the price of flagship 5G mobile phones has generally risen. Many users who need to replace the phone are more concerned about: What are the flagship 5G mobile phones with a budget of around 5K?

Under the influence of the epidemic, users with tight wallets will also be more price sensitive to flagship 5G mobile phones. According to the reporter’s understanding, in the current domestic mobile phone market, in addition to Huawei’s own Kirin chips, the 5G flagship phones recently released intensively by other mobile phone manufacturers, such as the OPPO high-end series Find X2 series, are equipped with high-end Qualcomm Snapdragon 865. Chip, and due to Qualcomm’s price increase policy, the cost of the Snapdragon 865 is twice as expensive as the previous generation. Compared with the conventional 5G model, the cost of the flagship 5G mobile phone has increased and the price is slightly more expensive. .

So what are the flagship 5G phones with budgets around 5K? Taking the OPPO Find X2 series mentioned above as an example, the new OPPO Find X2 (8GB+128GB) version launched in March is priced at 5499 yuan. Capability, excellent battery life and fast charging performance directly confirm the name of “2020 Flagship Benchmark” in the eyes of consumers and the industry.

It is worth mentioning that the OPPO Find X2 comes standard with a QHD+120Hz super-sensitive screen, which is a rare screen in the industry that supports 10-bit color depth, bringing as many as 1.07 billion color displays. The color accuracy of this screen is The highest average JNCD is 0.4 (the average JNCD in the cinema mode is 0.4, the average JNCD in the soft mode is 0.4, and the average JNCD in the default vivid mode is 0.8), and it is even comparable to professional monitors.

As one of the mobile phone functions that consumers are most concerned about, OPPO Find X2 is equipped with a three-camera combination of 48 million main camera (IMX586) + 12 million movie lens (IMX708) + 13 million pixel vertical telephoto, covering a relatively complete focal length, supporting 5x hybrid optical zoom, up to 20x digital zoom, the ultra-wide-angle lens can shoot both ultra-wide-angle and macro, which not only ensures the clarity and movement of the face and background, but also takes into account the clear and natural portrait and background, fully satisfying users’ daily shooting need.

In terms of hard-core performance, OPPO Find X2 series, supported by the most powerful Snapdragon 865 mobile processing platform, has ultra-high screen refresh rate, ultra-fast 5G network speed and professional video shooting, and is equipped with industry-leading charging The astonishingly fast 65W SuperVOOC 2.0 super flash charge can fully charge the 4200mAh Find X2 in just 38 minutes, eliminating consumers’ low-battery troubles from the root and giving users the ultimate 5G experience.

What are the flagship 5G phones with budgets around 5K? Entering the 5G era, when people talk about “5G mobile phones”, they are not only referring to “mobile phones that support 5G and can be connected to 5G networks”, but must “make full use of 5G network speed and bring high network speeds to the market.” Products that reflect the advantages of the content from the past.” Based on this, the OPPO Find X2 series, whose price is highly compatible with performance and quality, must be a good choice.

The Links:   CM600HA-12H QM200DY-H

How an Integrated Brushed DC Solution Reduces Automotive Motor Size, Enhances Protection, and Simplifies Design

Simple, low-cost, and versatile brushed DC motors are ideal for automotive loads that require an integrated, high-Power reliable motor driver, such as window lifters, sunroof controls, door locks, latches, and engine valves.

Simple, low-cost, and versatile brushed DC motors are ideal for automotive loads that require an integrated, high-power reliable motor driver, such as window lifters, sunroof controls, door locks, latches, and engine valves.

If you’re designing an automotive system, you may face both device-level and system-level challenges, including size constraints, failure conditions, and the need for reusability to reduce development time. Therefore, this paper will analyze these challenges in detail and provide corresponding solutions.

Reduce system size with fully integrated high power density motor driver

Reducing system size and saving board space are important considerations when designing cost-optimized automotive systems. Reducing package size and integrating functionality into brushed DC drivers reduces external component count, saving board space and reducing cost.

When designing small systems, the following improvements should be considered:

• Small package size – For high power density solutions, use a small package size with high current capability. The DRV8243-Q1 series introduces an automotive HotRod quad flat no-lead package with a minimum size of 3mm x 4.5mm, which is one of the ultra-small packages in its class for brushed DC drives.

• Integrated Current Sense – Internal current regulation and current feedback pins eliminate the need for external current sense resistors, saving board space and reducing cost.

• Integrated Field Effect Transistor (FET) solution – The DRV8243-Q1 family can drive up to 32A peak H-bridge current and 46A peak half-bridge current. Save board space and reduce cost with an integrated solution that supports medium to high currents, eliminating the need for gate drivers and external FETs. Current capability depends on printed circuit board design and ambient thermal conditions, so be sure to check out our transient thermal calculator to see how much current your system can drive.

Using a smaller package (as shown in Figure 1) and minimizing the number of external components can reduce board size and bill of materials costs.

Figure 1: DRV8245-Q1 Device Family Size Comparison

Protection and diagnostic functions for a reliable solution

Motor drives play an important role in applications ranging from electric trunk doors to gas engine valves. Therefore, it is necessary to design reliable solutions that can detect and prevent various failure conditions.

The DRV8243-Q1 device family is the first to provide open-load detection and short-circuit protection when the motor driver is both on and off. Figure 2 shows how the device offline protection feature uses a passive resistor network connected to the H-bridge to detect system problems before enabling the FET. This feature helps avoid damage or erratic behavior of the motor driver even when the H-bridge is off.

Figure 2: Off-State Diagnostics of the DRV8243-Q1

Offline diagnostics help protect motor drives from failures elsewhere in the system and avoid overall wear. For more information on how TI’s offline protection feature protects automotive systems, see the application note “Open Load Detection in Motor Drives”

The Serial Peripheral Interface option provides detailed diagnostics designed to identify the type and location of the fault, saving designers time troubleshooting by providing the root cause of motor driver faults.

Optimized design with scalable drives

Motor drivers drive various loads in the car, such as relays, solenoid valves, and motors. Sometimes these loads are all pooled in the same application, such as door modules or body control modules.

The DRV8243-Q1 family of H-bridge and half-bridge drivers enables design reuse to extend different loads in automotive systems. This family of devices has similar firmware, features and package pinouts, enabling reuse over a wide range of loads and currents, helping to reduce design time. When used in standalone mode, the H-bridge driver can drive two unidirectional brushed DC motors, solenoids, or relays without the need for two separate half-bridge drivers; as shown in Figure 3.

Figure 3: Scaling Across Multiple Loads Using DRV8243-Q1 Series Models

In addition to having similar firmware, the DRV8243-Q1 and DRV8244-Q1 leaded packages are pin-to-pin compatible, making it easier to insert and replace these devices when scaling up or down power levels.

Solution size, protection performance and design reuse are key factors to consider when designing an automotive solution. If you have any questions related to the content in this article, you are welcome to ask them in the TI E2E Motor Driver Forum.

The Links:   CM200TXPA-24T CM300DY-24G PM800HSA120

Classification and main parameter analysis of solid-state lithium-ion batteries

What is a solid-state lithium-ion battery? With the rapid development of society, our solid-state lithium-ion batteries are also developing rapidly, so do you know the detailed analysis of solid-state lithium-ion batteries? Next, let Xiaobian lead you to learn more about solid-state lithium-ion batteries.

What is a solid-state lithium-ion battery? With the rapid development of society, our solid-state lithium-ion batteries are also developing rapidly, so do you know the detailed analysis of solid-state lithium-ion batteries? Next, let Xiaobian lead you to learn more about solid-state lithium-ion batteries.

The so-called “all-solid-state lithium battery” is a lithium battery in which the electrodes and electrolyte materials used in the working temperature range are solid and do not contain any liquid components. The full name is “all-solid-state electrolyte lithium battery”. Therefore, the all-solid-state lithium battery is already the most acronym for a word that cannot be omitted and cannot be changed. In order to help understanding, Professor Ouyang gave an example, just like “all-solid-state” is different from “solid-state”, and “lithium battery” and “lithium-ion battery” are not the same concept. This all-solid-state lithium battery is further divided into an all-solid-state lithium primary battery and an all-solid-state lithium secondary battery, and the primary battery has already been used. All-solid-state lithium secondary batteries are further divided into all-solid-state lithium-ion batteries and lithium metal batteries, which are two concepts that need to be distinguished.

The so-called solid-state lithium-ion battery is a solid state regardless of the electrodes and electrolyte. Lithium-ion batteries commonly used on the market today all use liquid or polymer electrolyte materials.

The solid lithium thin film secondary battery is prepared into a thin film on a substrate in the order of anode, electrolyte and cathode, and is packaged into a battery. During the preparation process, the respective thin film layers of the battery are prepared using corresponding techniques. Generally speaking, the negative electrode is mostly made of metallic lithium, which is prepared by vacuum thermal deposition (VD) technology. Electrolyte and positive electrode including oxide negative electrode can adopt various sputtering techniques, such as radio frequency sputtering (RFS), radio frequency magnetron sputtering (RFMS), etc.

It is easy for liquids to combine with solids and penetrate into them. But the solid-solid contact and stability are not very good, which is a big problem. Although sulfide electrolytes have improved lithium ion conductivity, they still have problems with interfacial contact and stability. The third problem is the rechargeability of metallic lithium. In solid-state electrolytes, pulverization and dendrite growth also exist on the lithium surface. Its circularity and even safety still need to be studied. In addition, the high manufacturing cost is also a major problem in its development.

Of course, solid-state batteries are currently facing some development problems, the biggest of which is that there is still a very large gap between their own electrical conductivity and liquid electrolytes. In addition, the interfacial stability between solid electrolyte and electrode material is also one of the problems to be solved.

In terms of preparation process, due to the poor elasticity of the current solid-state electrolyte membrane, the solid-state battery assembly is more prone to delamination than the winding process, but the subdivision process is unknown. In terms of manufacturing equipment, although solid-state batteries are very different from traditional lithium-ion batteries, there is no need to customize equipment in the process of painting, packaging, etc., and the manufacturing environment must be carried out in a drying room with higher requirements. fundamentally different.

Solid electrolytes are mainly classified into two types, inorganic electrolytes and polymer electrolyte materials.

Some parameters for evaluating solid electrolytes mainly include: high ionic conductivity, low ionic area specific resistance, high electron area specific resistance, high ionic selectivity, wide electrochemical stability window, good chemical compatibility, excellent Thermal stability, excellent mechanical properties, simple preparation process, low price, easy integration and environmental friendliness.

The above is a detailed analysis of the relevant knowledge of solid-state lithium-ion batteries. It is necessary for everyone to continuously accumulate experience in practice, so as to design better products and develop better for our society.

The Links:   LJ64HB34 6MBP50RA120 IGBT-MODULE

C2000 MCU prompts “flash is not available on this device” error solution

When using C2000™ MCU products, it is possible that the emulator will report “flash is not available on this device” after the emulator is connected to the target board. The detailed error message is as follows. In fact, the chip itself has Flash.


When using C2000™ MCU products, it is possible that the emulator will report “flash is not available on this device” after the emulator is connected to the target board. The detailed error message is as follows. In fact, the chip itself has Flash.

C28xx_CPU1: GEL Output:

RAM initialization done
C28xx_CPU1: GEL Output:
Memory Map Initialization Complete
C28xx_CPU1: GEL Output: … DCSM Initialization Start …
C28xx_CPU1: GEL Output: … DCSM Initialization Done …
C28xx_CPU1: Error initializing flash programming: Interface returned from dll, but flash is not available on this device.

At this time, all operations on the chip Flash (erase, program, verify, read) will report the error shown in Figure 1.

Figure 1

The reason for this may be that the code of the chip Flash is incomplete or has errors, which causes the CPU to work abnormally. Although the emulator can be connected, the chip information read by the emulator may be wrong, resulting in the above error.

If there is no effective way to solve this error, all operations on the chip Flash will be invalid, and only by changing the chip can the board work normally.

This article will take the C2000 F28002x series and CCS11 as examples to introduce two solutions to the “flash is not available on this device” problem. Other C2000 series chips such as F28003x/F28004x/F2837x/F2838x encounter this problem, and you can also use this method to solve this problem.

Method 1: Change the boot mode.

As shown in Figure 2, the boot mode pin jumper is set to Wait Boot Mode, so that the CPU will stay in the internal BOOT ROM area of ​​the chip when powered on, and will not enter the user’s own Flash code.

Figure II

At this time, when the emulator is connected, the chip information can be read normally, and the previous error will not be reported. Next, as shown in Figure 3, we select “Entire Flash” in “Erase Settings” through “ToolsàOn-Chip Flash”, Then click “Erase Flash” to erase the entire Flash of the chip, and the chip will become an empty chip.

Figure 3

Method 2: Change the XML file.

Step 1: Generate CCS logs file.

1a. As shown in Figure 4, click “Help” and then select “CCS Support”.

Figure 4

1b. As shown in Figure 5, select “Debug Server Log”, and then click “Properties”.

Figure 5

1c. As shown in Figure 6, check “Enable Debug Server Logging”, then select the path to store the log file and name it, for example, test.log, then click OK.

Figure 6

1d. Start the CCS simulation, and a log file will be generated.

1f. Open the log file with CCS or a text editor, as shown in Figure 7, find the Device ID, and write down the ID number, such as (0x771923).

Figure 7

Step 2: Change the xml file.

2a. Locate the TMS320F28002x.xml file in the following path. It is recommended to back up this file first, and then use this backup file later.

C: iccs1100ccsccs_basec2000 owFlashconfigs

2b. Open the TMS320F28002x.xml file with a text editor or CCS, as shown in Figure 8, search for DeviceId, and replace the Device ID number recorded in step 1f with the DeviceId value in the TMS320F28002x.xml file. That is, change 0x771973 to 0x771923. Then save the changes and close CCS (remember to close CCS, because the xml changes will only take effect the next time CCS starts).

Figure 8

Step 3: Start CCS and enter the simulation interface.

At this time, CCS no longer reports the previous error, and the Flash can operate normally. Next, we use “ToolsàOn-Chip Flash”, select “Entire Flash” in “Erase Settings”, and then click “Erase Flash” to erase the entire FLASH of the chip, and the chip will become an empty chip.

Step 4: Restore the xml file.

You can restore the TMS320F28002x.xml file backed up in step 2a, or change the DeviceId in the existing TMS320F28002x.xml from 0x771923 to 0x771973.

So far, the chip can operate the Flash normally, and the problem has been solved. Compared with the first method, the advantage of the second method is that it does not require hardware jumpers, which is more convenient for the actual operation of the customer. Also, if the first method doesn’t work, you can also try the second method.

The Links:   LJ640U80 FS100R12KE3